status

Completed

year

2026

type

Technical Survey Paper

Abstract

This technical survey paper examines the growing role of artificial intelligence in semiconductor manufacturing and microprocessor design. The study begins from the increasing complexity of modern chips and fabrication processes, where traditional scaling alone is no longer enough to manage process variation, design-rule complexity, power density, defects, and the enormous design spaces involved in advanced hardware systems. In semiconductor manufacturing, the paper explains how AI and machine learning support smart factory workflows by learning from sensor data, equipment logs, wafer maps, inspection images, and metrology results. Key manufacturing applications include predictive maintenance, where models estimate equipment health and detect abnormal tool behavior before failures occur; fault detection and defect classification, where image-based models can identify wafer defects and repeated abnormal patterns; and virtual metrology, where machine learning predicts wafer properties such as film thickness, overlay error, critical dimension, or etch depth without waiting for slow or expensive physical measurements. These applications show how AI can help reduce downtime, improve yield, and support faster process control in semiconductor fabrication plants. The paper then surveys AI in microprocessor and chip design, especially within electronic design automation workflows. It explains how AI-assisted EDA can support placement, routing, timing estimation, congestion prediction, tool-parameter tuning, and Power, Performance, and Area optimization. Since modern chip design involves huge search spaces and multi-objective trade-offs, machine learning, reinforcement learning, Bayesian optimization, surrogate modeling, and graph-based methods can guide engineers toward better design decisions with fewer expensive full-flow iterations. The survey also discusses reinforcement-learning-based chip floorplanning, where macro placement is treated as a sequential decision problem, and commercial AI-driven EDA platforms such as Synopsys DSO.ai, which search design alternatives to improve PPA results. Additional examples include AI for arithmetic circuit optimization and hardware-software co-design, where workload behavior can guide architectural decisions such as cache sizes, memory hierarchy, dataflow strategies, and accelerator configurations. The paper also highlights major challenges that limit AI adoption in this field, including semiconductor data quality, proprietary datasets, rare failure examples, model interpretability, computational cost, and integration with strict manufacturing and sign-off workflows. The survey concludes that AI is not a replacement for engineering expertise. Instead, it acts as a powerful assistant that helps engineers manage complexity, search larger design spaces, improve manufacturing decisions, and build next-generation computing hardware more efficiently.